The present invention relates to a semiconductor IC ROM of small chip size.
A read-only memory (ROM) is generally formed of one transistor/one memory cell. Methods for storing data in such a ROM include the following:
(a) High and low levels of the gate threshold voltage of the cell transistor are made to correspond with the stored data. For example, logic 1 is assigned to the stored data of the cell transistor of high threshold level. Logic 0 is assigned to the stored data of the cell transistor of low threshold level.
(b) The stored data is discriminated according to whether or not the drain (or source) of the cell transistor is connected to a data line of the memory. For example, logic 0 is assigned to the stored data of the cell transistor connected to the data line, and logic 1 is assigned to the stored data of the cell transistor disconnected from the data line.
Readout of the data in method (a) above is performed in the manner to be described below. First, a drive voltage Va of a given potential is applied to a word line to which are connected the gates of the cell transistors which are assigned to logic 0 or 1. If the threshold voltage of the transistor of logic 1 is represented by VH, and if the threshold voltage of the transistor of logic 0 is represented by VL, the relation VH&gt;Va&gt;VL holds. Therefore, the cell transistor of logic 1 is turned off and the cell transistor of logic 0 is turned on. By this on/off operation, the data lines to which these transistors are connected are charged or discharged. Then, based on the high or low data line potential corresponding to this charging or discharging, the stored data, logic 1 or logic 0, is read out.
Readout of the data in method (b) is performed in the manner to be described below. First, a drive voltage Vb of a given potential is applied to a word line. To this word line are connected the gates of cell transistors of logic 0 and cell transistors of logic 1. The gate threshold voltages of these cell transistors are all represented by VTH which satisfies the relation Vb&gt;VTH. Therefore, all the cell transistors are turned on. A data line connected to one of these turned on cell transistors acquires a low potential. A data line which is connected to none of these turned on cell transistors acquires a high potential. Based on the high or low potential, the stored data, logic 1 or 0, is read out.
In either of methods (a) and (b) described above, only one-bit data (logic 1 or 0) can be stored in one memory cell. Therefore, when an attempt is made to increase the memory capacity with a prior art IC ROM, the IC chip size correspondingly increases. This is a main factor for the higher cost of IC memories.